1/10 october 2004 stW29NK50Z n-channel 500 v - 0.105 ? - 31a to-247 zener-protected supermesh? mosfet table 1: general features typical r ds (on) = 0.105 ? extremely high dv/dt capability 100% avalanche tested gate charge minimized very low intrinsic capacitances very good manufacturing repeatibility description the supermesh? series is obtained through an extreme optimization of st?s well established strip-based powermesh? layout. in addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding application. such series complements st full range of high vltage mos- fets including revolutionary mdmesh? products. applications high current, high speed switching ideal for off-line power supplies welding machines lighting table 2: order codes figure 1: package figure 2: internal schematic diagram type v dss r ds(on) i d p w stW29NK50Z 500 v < 0.13 ? 31 a 350 w 1 2 3 to-247 part number marking package packaging stW29NK50Z W29NK50Z to-247 tube rev. 1
stW29NK50Z 2/10 table 3: absolute maximum ratings (*) pulse width limited by safe operating area (1) i sd 31 a, di/dt 200 a/s, v dd v (br)dss , t j t jmax table 4: thermal data table 5: avalanche characteristics table 6: gate-source zener diode protection features of gate-to-source zener diodes the built-in back-to-back zener diodes have specifically been designed to enhance not only the device ? s esd capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. in this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device ? s integrity. these integrated zener diodes thus avoid the usage of external components. symbol parameter value unit v ds drain-source voltage (v gs = 0) 500 v v dgr drain-gate voltage (r gs = 20 k ?) 500 v v gs gate- source voltage 30 v i d drain current (continuous) at t c = 25 c 31 a i d drain current (continuous) at t c = 100 c 19.5 a i dm (*) drain current (pulsed) 124 a p tot total dissipation at t c = 25 c 350 w derating factor 2.77 w/ c v esd(g-s) gate source esd (hbm-c = 100pf, r = 1.5 k ?) 6000 v dv/dt (1) peak diode recovery voltage slope 4.5 v/ns t stg t j storage temperature operating junction temperature -55 to 150 c rthj-case thermal resistance junction-case max 0.36 c/w rthj-amb t l thermal resistance junction-ambient max maximum lead temperature for soldering purpose 50 300 c/w c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 31 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 550 mj symbol parameter test condition min. typ. max unit bv gso gate-source breakdown voltage igs= 1ma (open drain) 30 a
3/10 stW29NK50Z table 7: electrical characteristics (t case =25 c unless otherwise specified) on /off table 8: dynamic table 9: source drain diode (1) pulsed: pulse duration = 300 s, duty cycle 1.5 %. (2) pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1 ma, v gs = 0 500 s i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, t c = 125 c 1 50 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 150 a 3 3.75 4.5 v r ds(on) static drain-source on resistance v gs = 10 v, i d = 15.5 a 0.105 0.13 ? symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds = 15 v, i d = 15.5 a 24 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25 v, f = 1 mhz, v gs = 0 6110 697 166 pf pf pf t d(on) t r t d(off) t f turn-on delay time rise time turn-off-delay time fall time v dd = 250 v, i d = 15 a, r g = 4.7 ?, v gs = 10 v (resistive load see figure 17) 44.5 41 129 33 ns ns ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 400 v, i d = 30 a, v gs = 10 v 190 35.5 111 266 nc nc nc symbol parameter test conditions min. typ. max. unit i sd i sdm (2) source-drain current source-drain current (pulsed) 31 124 a a v sd (1) forward on voltage i sd = 31 a, v gs = 0 1.6 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 30 a, di/dt = 100 a/s v dd = 44.8v, t j = 25 c (see test circuit figure 5) 436 6.1 28 ns c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 30 a, di/dt = 100 a/s v dd = 44.8v, t j = 150 c (see test circuit figure 5) 500 7.5 30 ns c a
stW29NK50Z 4/10 figure 3: safe operating area figure 4: output characteristics figure 5: transconductance figure 6: thermal impedance figure 7: transfer characteristics figure 8: static drain-source on resistance
5/10 stW29NK50Z figure 9: gate charge vs gate-source voltage figure 10: normalized gate thereshold volt- age vs temperature figure 11: dource-drain diode forward char- acteristics figure 12: capacitance variations figure 13: normalized on resistance vs tem- perature figure 14: normalized bv dss vs temperature
stW29NK50Z 6/10 figure 15: maximum avalanche energy vs temperature
7/10 stW29NK50Z figure 16: unclamped inductive load test cir- cuit figure 17: switching times test circuit for resistive load figure 18: test circuit for inductive load switching and diode recovery times figure 19: unclamped inductive wafeform figure 20: gate charge test circuit
stW29NK50Z 8/10 dim. mm. inch min. typ max. min. typ. max. a 4.85 5.15 0.19 0.20 a1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 b2 3.0 3.40 0.118 0.134 c 0.40 0.80 0.015 0.03 d 19.85 20.15 0.781 0.793 e 15.45 15.75 0.608 0.620 e5.45 0.214 l 14.20 14.80 0.560 0.582 l1 3.70 4.30 0.14 0.17 l2 18.50 0.728 ? p 3.55 3.65 0.140 0.143 ? r 4.50 5.50 0.177 0.216 s5.50 0.216 to-247 mechanical data
9/10 stW29NK50Z table 10: revision history date revision description of changes 19-oct-2004 1 first release.
stW29NK50Z 10/10 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com
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